David Andrews Source Confirmed

Affiliation confirmed via AI analysis of OpenAlex, ORCID, and web sources.

Assistant Professor

University of Arkansas at Fayetteville

faculty

10 h-index 34 pubs 391 cited

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Biography and Research Information

OverviewAI-generated summary

David Andrews' research focuses on the intersection of computing, machine learning, and cryptography, with an emphasis on hardware implementations and security analysis. He has investigated methods for accelerating machine learning models, particularly recurrent neural networks and LSTMs, for time-series forecasting and dynamic system modeling. His work includes the development of customizable FPGA overlays to optimize memory-centric machine learning applications.

Andrews also contributes to the field of cybersecurity, with a focus on post-quantum cryptography (PQC). He has published on power-based side-channel attack analysis on PQC algorithms and the development of masked hardware implementations for cryptographic algorithms like Kyber. His federal grant funding from the NSF supports infrastructure for performing side-channel attacks on cryptographic algorithms.

His scholarly output includes 34 publications and 391 citations, with an h-index of 10. Andrews collaborates extensively with researchers at the University of Arkansas at Fayetteville, including Miaoqing Huang, Ehsan Kabir, Tendayi Kamucheka, and Alexander Nelson. He leads a research group and remains an active researcher.

Metrics

  • h-index: 10
  • Publications: 34
  • Citations: 391

Selected Publications

  • DA-VinCi: A Deep-Learning Accelerator Overlay Using In-Memory Computing (2025) DOI
  • N-TORC: Native Tensor Optimizer for Real-Time Constraints (2025) DOI
  • Optimized Coding and Parameter Selection for Efficient FPGA Design of Attention Mechanisms (2025) DOI
  • Resource Scheduling for Real-Time Machine Learning (2025) DOI
  • Famous: Flexible Accelerator for the Attention Mechanism of Transformer on Ultrascale+ FPGAs (2024) DOI
  • ProTEA: Programmable Transformer Encoder Acceleration on FPGA (2024) DOI
  • IMAGine: An In-Memory Accelerated GEMV Engine Overlay (2024) DOI
  • The BRAM is the Limit: Shattering Myths, Shaping Standards, and Building Scalable PIM Accelerators (2024) DOI
  • Ph.D. Project: A Compiler-Driven Approach to HW/SW Co-Design of Deep-Learning Accelerators (2024) DOI
  • Towards Cloud-based Infrastructure for Post-Quantum Cryptography Side-channel Attack Analysis (2023) DOI
  • FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ? (2023) DOI
  • Accelerating LSTM-Based High-Rate Dynamic System Models (2023) DOI
  • FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ? (2023) DOI
  • Making BRAMs Compute: Creating Scalable Computational Memory Fabric Overlays (2023) DOI
  • A Runtime Programmable Accelerator for Convolutional and Multilayer Perceptron Neural Networks on FPGA (2022) DOI

Federal Grants 1 $100,000 total

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